AMD-IBM partnership produces new chip manufacturing process

NEARLY two years since they announced their partnership, IBM and chip company AMD have unveiled a new processor manufacturing technology that improves chip performance by as much as 24 percent without increasing power consumption.
The two firms claim they have perfected a new strained silicon transistor technique called “dual stress liner” which enhances the performance of two types of semiconductor transistors, called the “n-channel” and “p-channel.”

The process stretches and compresses atoms of both the n-channel and p-channel transistors without introducing new but costly production techniques, allowing for their rapid integration into mass-volume manufacturing using standard equipment.

AMD and IBM would be the first in the electronics industry to simultaneously enhance the performance of both types of transistors in a semiconductor using conventional materials.

Nick Kepler, vice president of logic technology development for AMD, said the breakthrough in strained silicon engineering is a better way of delivering the performance enhancements and power reduction for new AMD Opteron and AMD Athlon 64-bit processors.

AMD plans to ship 90-nanometer AMD Athlon 64 products that use the new strained silicon technology in the first quarter of 2005 and also plans to integrate it into all of its 90 nanometer processor platforms, such as the multi-core AMD64 processors.

Meanwhile, IBM is expected to introduce the technology on multiple 90 nanometer processor platforms -- including its Power Architecture-based chips -- in early 2005.

IBM and AMD have been collaborating on the development of next-generation semiconductor manufacturing technologies since January 2003.

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