STMicroelectronics Reports World Record for NAND Flash Data Throughput7 February 2006
STMicroelectronics (NYSE: STM), one of the world's leading semiconductor manufacturers, today unveiled details of an advanced 4 Gigabit NAND Flash memory that achieves a world record throughput of 36MB/s, some 50% greater than the best results achieved to date. The device, which is to be described at the International Solid State Circuits Conference (ISSCC), San Francisco, in a paper authored by researchers from STMicroelectronics and Hynix Semiconductor, incorporates a powerful embedded error-correction processor that can detect and correct up to five errors per page to ensure high reliability and fast data throughput while simplifying the design of the memory system.
High-density NAND Flash memories are key components in the burgeoning market for portable mass-storage devices such as USB keys and MP3 players. This market is characterized by an ever-increasing demand for greater memory capacities and lower cost-per-bit. Multilevel cell (MLC) technology, where each NAND Flash memory cell stores two or more bits of data, offers significant benefits in density and cost but suffers from the disadvantage that the data retention and memory cycling performance are reduced compared to single-bit cell (SBC) NAND Flash memories. For this reason, MLC NAND Flash memories normally require more complex error correction code (ECC) circuits and current practice with both SBC and MLC NAND Flash memories is to implement the error correction as an algorithm executed by the system processor. However, the processors typically used as system processors in these applications lack the dedicated modular arithmetic instructions required for optimal implementation of these algorithms, resulting in a throughput penalty that is typically several Mbytes/s.
The ST device employs a radically different approach in which a sophisticated ECC processor is embedded within the Flash memory. The dedicated processor implements the highly efficient and well-known error correction technique called BCH (Bose-Chaudhuri-Hocquenghem) that is widely used in WLAN and other applications where multiple data transmission errors need to be reliably detected and corrected. In addition, the embedded ECC processor is based on an innovative architecture that optimizes the ECC computations for byte-oriented, serial readout memory applications such as MP3 players and USB keys, minimizing silicon area, latency and power consumption. As a result, the ST device achieves a read throughput rate of 36MB/s, significantly greater than the best previously reported rate of 23MB/s before error correction.
"This innovative breakthrough will fast become standard in ST's two bit per cell NAND Flash roadmap," said Carla Golla, General Manager of ST's NAND Flash Memory Division. "Moreover, we fully expect this type of approach to be implemented as an industry standard feature in 2-bit per cell devices, which are rapidly increasing their share of the NAND Flash market. This method realizes the cost advantages of multilevel cell technology, but without sacrificing system read throughput and reliability."
Developed at ST's state-of-the-art Non-Volatile Memory facility in Agrate, Italy, the device achieves its record-breaking throughput with minimal overhead in terms of silicon area, power consumption, and latency. The area occupied by the ECC circuitry is only 1.3mm(2), representing less than 1% of the total chip area and the average current drawn by the chip is less than 1mA. The error correction circuitry is also partitioned to minimize time penalties when errors are detected: two separate error location blocks are provided, one of which corrects 2-5 errors with a 250 microns time overhead and one which corrects the much more likely single error in only 34 microns. As a result, the embedded ECC provides an optimized trade-off between silicon area and latency.
About STMicroelectronics
STMicroelectronics is a global leader in developing and delivering semiconductor solutions across the spectrum of microelectronics applications. An unrivalled combination of silicon and system expertise, manufacturing strength, Intellectual Property (IP) portfolio and strategic partners positions the Company at the forefront of System-on-Chip (SoC) technology and its products play a key role in enabling today's convergence markets. The Company's shares are traded on the New York Stock Exchange, on Euronext Paris and on the Milan Stock Exchange. In 2005, the Company's net revenues were $8.88 billion and net earnings were $266 million. Further information on ST can be found at http://www.st.com.
Source: prnewswire
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